Low-Power Clock Distribution Using a Current-Pulsed Clocked Flip-Flop.
Riadul IslamMatthew R. GuthausPublished in: IEEE Trans. Circuits Syst. I Regul. Pap. (2015)
Keyphrases
- low power
- power consumption
- high speed
- power dissipation
- low cost
- cmos technology
- single chip
- digital signal processing
- image sensor
- wireless transmission
- logic circuits
- high power
- low power consumption
- vlsi circuits
- power saving
- flip flops
- gate array
- low voltage
- vlsi architecture
- power reduction
- mixed signal
- pattern recognition
- real time