Cell in 65 nm Technology Utilizing Self-Write-Back Sense Amplifier and Cascaded Bit Line Scheme.
Keiichi KushidaAzuma SuzukiGou FukanoAtsushi KawasumiOsamu HirabayashiYasuhisa TakeyamaTakahiko SasakiAkira KatayamaYuki FujimuraTomoaki YabePublished in: IEEE J. Solid State Circuits (2009)