Hamming network circuits based on CMOS/memristor hybrid design.

Xuan Zhu Xuejun Yang Chunqing Wu Junjie Wu Xun Yi

Published in: IEICE Electron. Express (2013)

Keyphrases

circuit design
high speed
power consumption
cmos technology
delay insensitive
chip design
low cost
peer to peer
design process
analog vlsi
genetic algorithm
hamming distance
power dissipation