A Mixed-Signal RISC-V Signal Analysis SoC Generator With a 16-nm FinFET Instance.
Steven BaileyPaul RiggeJaeduk HanRichard LinEric ChangHoward MaoZhongkai WangChick MarkleyAdam M. IzraelevitzAngie WangNathan NarevskyWoo-Rham BaeSteve ShauckSergio MontanoJustin NorsworthyMunir RazzaqueWen Hau MaAkalu LentiroMatthew DoerfleinDarin HeckendornJim McGrathFranco DeSetaRonen ShohamMike StellfoxMark SnowdenJoseph ColeDan FuhrmanBrian C. RichardsJonathan BachrachElad AlonBorivoje NikolicPublished in: IEEE J. Solid State Circuits (2019)
Keyphrases
- signal analysis
- mixed signal
- low power
- cmos technology
- signal processing
- multiresolution
- power consumption
- low cost
- high speed
- multi channel
- empirical mode decomposition
- feature extraction
- wavelet decomposition
- image processing
- adaptive learning
- lifting scheme
- real time
- median filter
- embedded systems
- low voltage
- image quality