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Efficient OpenCL system integration of non-blocking FPGA accelerators.
Topi Leppänen
Atro Lotvonen
Panagiotis Mousouliotis
Joonas Multanen
Georgios Keramidas
Pekka Jääskeläinen
Published in:
Microprocess. Microsystems (2023)
Keyphrases
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field programmable gate array
real time
hardware implementation
single chip
high speed
computationally expensive
computationally efficient
information systems
signal processing
data integration
cost effective
data acquisition
shared memory
parallel programming
parallel architectures