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Novel Synthesis Methodology for Fault Tolerant Reversible Circuits by Bounded Model Checking for Linear Temporal Logic.
Ming-Cui Li
Ri-Gui Zhou
Published in:
J. Circuits Syst. Comput. (2015)
Keyphrases
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fault tolerant
bounded model checking
linear temporal logic
fault tolerance
temporal logic
model checking
distributed systems
formal verification
load balancing
cooperative
multi agent systems
domain specific
orders of magnitude