Characterization and Considerations for Upset in FPGA.
Christian JohanssonTorbjorn ManefjordPublished in: NORCAS (2018)
Keyphrases
- hardware implementation
- high speed
- field programmable gate array
- low cost
- verilog hdl
- hardware design
- real time image processing
- software implementation
- single chip
- hardware and software
- machine learning
- databases
- hardware architecture
- efficient implementation
- bayesian networks
- programmable logic
- digital signal
- systolic array
- gate array