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Design and Implementation of Operation-Reduced LDPC Decoder Based on a Check Node Stopping Scheme.

Cheng-Hung LinTzu-Hsuan HuangShu-Yen LinYu-Hsuan Lee
Published in: J. Circuits Syst. Comput. (2017)
Keyphrases
  • decoding algorithm
  • vlsi implementation
  • design process
  • low complexity
  • turbo codes
  • ldpc codes