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CMOS VLSI implementation of the 2D-DCT with linear processor arrays.

U. TotzekF. MatthiesenS. WohllebenTobias G. Noll
Published in: ICASSP (1990)
Keyphrases
  • vlsi implementation
  • fir filters
  • high speed
  • vlsi architecture
  • low power
  • single chip
  • discrete cosine transform
  • filter bank
  • focal plane
  • computer vision
  • low cost
  • image segmentation
  • multiscale
  • pattern recognition