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Very-large-scale integration implementation of a 16-bit clocked adiabatic logic logarithmic signal processor.

G. YemisciogluP. Lee
Published in: IET Comput. Digit. Tech. (2015)
Keyphrases
  • signal processor
  • low power
  • signal processing
  • single chip
  • high speed
  • logic programming
  • power consumption
  • bit parallel
  • face recognition
  • efficient implementation
  • digital images
  • multi view