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Opportunities for PMOS read and write ports in low voltage dual-port 8T bit cell arrays.
Bibiche M. Geuskens
Muhammad M. Khellah
Jaydeep Kulkarni
Tanay Karnik
Vivek De
Published in:
CICC (2010)
Keyphrases
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low voltage
random access memory
read write
design considerations
power line
write operations
power management
cmos technology
digital images
low cost
cost effective