Login / Signup
A novel design for ultra-low power pulse-triggered D-Flip-Flop with optimized leakage power.
Ahmad Karimi
Abdalhossein Rezai
Mohammad Mahdi Hajhashemkhani
Published in:
Integr. (2018)
Keyphrases
</>
parallel processing
power dissipation
ultra low power
design process
low power
case study
power consumption
real time
single chip