Allocation of FPGA DSP-macros in multi-process high-level synthesis systems.

Benjamin Carrión Schäfer

Published in: ASP-DAC (2014)

Keyphrases

high speed
high level synthesis
expert systems
distributed systems
signal processing
hardware implementation
real time image processing
computer vision
information systems
image processing
computer science
computing systems
software implementation
systolic array
verilog hdl