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Analysis and design of a 0.9 V 1 GHz-BW 14.6 dBm-OIP3 broadband receiver with current-mode analog baseband in 12 nm FinFET CMOS.

Guangao WangQi XiaoHaigang FengJie HuJingjing DongJie Yang
Published in: Microelectron. J. (2024)
Keyphrases
  • high speed
  • circuit design
  • real time
  • low cost
  • analog vlsi
  • future development