Architecture and Clock Programmable Baseband of an 800 MHz-6 GHz Software-Defined Wireless Receiver.
Rahim BagheriAhmad MirzaeiSaeed ChehraziAsad A. AbidiPublished in: VLSI Design (2007)
Keyphrases
- high speed
- software architecture
- clock frequency
- software platform
- hardware design
- power consumption
- software systems
- real time
- enterprise systems
- parallel architecture
- platform independent
- fpga device
- software development
- software defined radio
- computer systems
- wireless communication
- physical layer
- software implementation
- processor array
- nm technology
- mobile devices
- cmos technology
- multimedia communication
- communication technologies
- low power
- wireless networks
- high end
- data acquisition
- fourth generation
- wireless sensor networks
- voice and data services
- user interface