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A 5 Gb/s Time-Interleaved Voltage-Mode Duobinary Encoding Scheme for 3-D-Stacked IC.

Ji-Young KimJongsoo LeeKi-Ryong KimSunghwan JoByoung-Mo MoonKyomin SohnSeong-Ook Jung
Published in: IEEE J. Solid State Circuits (2022)
Keyphrases
  • encoding scheme
  • encoding schemes
  • genetic algorithm
  • integrated circuit
  • high speed
  • power system
  • transmission line
  • neural network
  • binary strings
  • image understanding
  • electric field
  • twig queries