Some initial results on hardware BLAST acceleration with a reconfigurable architecture.

Euripides Sotiriades Christos Kozanitis Apostolos Dollas

Published in: IPDPS (2006)

Keyphrases

reconfigurable architecture
systolic array
real time
image processing
low cost
hardware and software
data sets
image segmentation
hardware implementation
wireless sensor networks
general purpose
embedded systems
massively parallel
hardware architecture