A fault-tolerant pipelined architecture for symmetric block ciphers.

Min-Kyu Joo Yoon-Hwa Choi

Published in: Comput. Electr. Eng. (2005)

Keyphrases

fault tolerant
block cipher
pipelined architecture
fault tolerance
s box
hardware implementation
distributed systems
lightweight
hash functions
secret key
field programmable gate array
load balancing
pattern recognition
query processing
signal processing
image processing
computer vision
real time