An improved low transition test pattern generator for low power applications.

Govindaraj Vellingiri Ramesh Jayabalan

Published in: Des. Autom. Embed. Syst. (2017)

Keyphrases

low power
pattern generator
power consumption
low cost
low power consumption
high speed
vlsi architecture
logic circuits
single chip
wireless transmission
vlsi circuits
digital signal processing
high power
cmos technology
power reduction
mixed signal
ultra low power
signal processor
wireless communication