Automatic Generation of Split-Radix 2-4 Parallel-Pipeline FFT Processors: Hardware Reconfiguration and Core Optimizations.
Alexander A. PetrovskySergei L. ShkredovPublished in: PARELEC (2006)
Keyphrases
- parallel architecture
- floating point
- floating point arithmetic
- parallel processing
- parallel architectures
- high end
- shared memory
- instruction set
- multi core processors
- parallel computation
- processing elements
- parallel execution
- distributed memory
- fourier transform
- graphics processing units
- single processor
- parallel hardware
- parallel processors
- hardware implementation
- parallel algorithm
- memory bandwidth
- massively parallel
- parallel programming
- multithreading
- parallel computing
- processing units
- computer architecture
- fast fourier transform
- parallel implementation
- real time
- data parallelism
- highly parallel
- embedded processors
- low cost
- parallel computers
- multiprocessor systems
- hardware architecture
- fixed point
- commodity hardware
- message passing interface
- hardware and software
- frequency domain
- level parallelism
- image processing
- signal processor
- pipeline architecture
- high performance computing
- computational power
- computing systems
- power reduction
- digital computer
- signal processing
- multicore processors
- automatically generate
- associative memory
- field programmable gate array
- bit parallel
- operating system
- message passing