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A 14-GHz Bang-Bang Digital PLL with sub-150fs Integrated Jitter for Wireline Applications in 7nm FinFET.

Dirk PfaffRobert AbbottXin-Jie WangBabak ZamanlooyShahaboddin MoazzeniRaleigh SmithChih-Chang Lin
Published in: CICC (2019)
Keyphrases
  • digital media
  • frequency band
  • case study
  • high resolution
  • high speed
  • packet loss
  • digital curves
  • digital technologies
  • circuit design