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Digital delay locked loop with open-loop digital duty cycle corrector for 1.2Gb/s/pin double data rate SDRAM.

Chun-Seok JeongChangsik YooJae-Jin LeeJoongsik Kih
Published in: ESSCIRC (2004)
Keyphrases
  • data structure
  • open loop
  • linear programming
  • computer systems
  • closed loop