Performance evaluation of the SM4 cipher based on field-programmable gate array implementation.
Sa'ed AbedReem JaffalBassam Jamil MohdMohammad AlshayejiPublished in: IET Circuits Devices Syst. (2021)
Keyphrases
- field programmable gate array
- hardware implementation
- fpga technology
- hardware architecture
- fpga device
- software implementation
- hardware software co design
- image processing algorithms
- programmable logic
- general purpose processors
- hardware design
- fpga implementation
- digital signal processors
- real time
- hardware description language
- xilinx virtex
- reconfigurable hardware
- computing systems
- efficient implementation
- neural network
- computer systems
- query processing
- case study