Design of low power multi-ternary digit multiplier in CNTFET technology.
Trapti SharmaLaxmi KumrePublished in: Microprocess. Microsystems (2020)
Keyphrases
- low power
- gate array
- cmos technology
- low cost
- single chip
- low power consumption
- power consumption
- high speed
- logic circuits
- vlsi architecture
- nm technology
- digital signal processing
- wireless transmission
- ultra low power
- high power
- cmos image sensor
- power reduction
- mixed signal
- power dissipation
- design process
- video data