A 10-bit 200-MS/s CMOS parallel pipeline A/D converter.

Lauri Sumanen Mikko Waltari Kari A. I. Halonen

Published in: IEEE J. Solid State Circuits (2001)

Keyphrases

analog to digital converter
low voltage
random access memory
parallel architecture
bit parallel
low cost
parallel implementation
shared memory
control method
data conversion
high voltage
analog vlsi
neural network
transfer function
parallel execution
low power
vlsi circuits
high speed