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Configurable M-factor VLSI DVB-S2 LDPC decoder architecture with optimized memory tiling design.

Gabriel Falcão Paiva FernandesMarco Alexandre Cravo GomesVítor Manuel Mendes da SilvaLeonel SousaJoao Cacheira
Published in: EURASIP J. Wirel. Commun. Netw. (2012)
Keyphrases
  • vlsi architecture
  • low complexity
  • software architecture
  • fpga implementation
  • memory hierarchy
  • signal processing
  • design process
  • design methodology
  • memory management
  • vlsi implementation
  • distributed video coding