A low power, area efficient limiting amplifier in 90nm CMOS.
Filip TavernierMichiel SteyaertPublished in: ESSCIRC (2009)
Keyphrases
- low power
- high power
- power consumption
- cmos technology
- low cost
- high speed
- nm technology
- single chip
- wireless transmission
- vlsi circuits
- logic circuits
- low power consumption
- real time
- power reduction
- delay insensitive
- gate array
- power dissipation
- low voltage
- digital signal processing
- mixed signal
- image sensor
- power management
- vlsi architecture
- dynamic range
- signal processor
- hardware and software