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The Design of a Fully Differential Capacitive Pressure Sensor with Unbalanced Parasitic Input Capacitances in 130nm CMOS Technology.
B. T. Bradford
Wolfgang H. Krautschneider
Dietmar Schroeder
Published in:
BIODEVICES (2013)
Keyphrases
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cmos technology
low power
image sensor
spl times
parallel processing
sensor networks
power consumption
user interface
low voltage
design process
power dissipation
cmos image sensor
flip flops
single chip
design methodology
hardware and software
efficient implementation