C
search
search
reviewers
reviewers
feeds
feeds
assignments
assignments
settings
logout
Acceleration for Timing-Aware Gate-Level Logic Simulation with One-Pass GPU Parallelism.
Weijie Fang
Yanggeng Fu
Jiaquan Gao
Longkun Guo
Gregory Z. Gutin
Xiaoyan Zhang
Published in:
CoRR (2023)
Keyphrases
</>
parallel processing
parallel computing
parallel computation
real time
simulation model
low cost
predicate logic
asynchronous circuits
lower level
parallel implementation
levels of abstraction
simulation environment
mathematical analysis
classical logic
parallel computers
parallel architectures