Login / Signup
Design of a 1.8 V 4.9 ~ 5.9 GHz CMOS broadband low noise amplifier with 0.28 dB gain flatness using AMER inductor loads.
Yin-Lung Lu
Yi-Cheng Wu
Kyung-Wan Yu
Wei-Li Chen
M. Frank Chang
Published in:
ISCAS (1) (2004)
Keyphrases
</>
high speed
circuit design
database
case study
response time
missing data
noisy data
signal to noise ratio
noise level
low signal to noise ratio