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Design of a 1.8 V 4.9 ~ 5.9 GHz CMOS broadband low noise amplifier with 0.28 dB gain flatness using AMER inductor loads.

Yin-Lung LuYi-Cheng WuKyung-Wan YuWei-Li ChenM. Frank Chang
Published in: ISCAS (1) (2004)
Keyphrases
  • high speed
  • circuit design
  • database
  • case study
  • response time
  • missing data
  • noisy data
  • signal to noise ratio
  • noise level
  • low signal to noise ratio