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An Efficient Graph Accelerator with Distributed On-Chip Memory Hierarchy.

Ran ZhengYingxin JiangYibo WangYongbo SuLong ZhengPengcheng YaoXiaofei LiaoHai Jin
Published in: ICA3PP (2022)
Keyphrases
  • memory hierarchy
  • low cost
  • computing power
  • memory access
  • distributed systems
  • computing environments
  • control flow
  • multi dimensional
  • computer architecture
  • memory management