Login / Signup

On the Construction of a Prolog-Based Verifier for Systolic Array Designs.

Timothy K. ShihNam LingRuth E. DavisFuyau Lin
Published in: Comput. Intell. (1995)
Keyphrases
  • systolic array
  • reconfigurable architecture
  • data flow
  • parallel architecture
  • programming language
  • construction process
  • logic programming
  • theorem proving
  • knowledge base
  • image processing
  • data model