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Reconfigurable processor for energy-scalable computational photography.
Rahul Rithe
Priyanka Raina
Nathan Ickes
Srikanth V. Tenneti
Anantha P. Chandrakasan
Published in:
ISSCC (2013)
Keyphrases
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computational photography
digital signal
systolic array
energy consumption
high speed
high dynamic range imaging
computer graphics
low cost
functional units
multiscale
hardware implementation
low power
motion blur