A 0.13µm CMOS delay cell for 40 Gb/s FFE equalization.

T. Lovitt Calvin Plett John W. M. Rogers

Published in: ISCAS (2006)

Keyphrases

high speed
power consumption
power dissipation
low power
low cost
power supply
microscope images
vlsi circuits
real time
multipath
critical path
analog vlsi
end to end
microscopic images
delay insensitive
stem cell