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Power-Efficient State Exchange Scheme for Low-Latency SMU Design of Viterbi Decoder.

Chun-Yuan ChuAn-Yeu Wu
Published in: J. Signal Process. Syst. (2012)
Keyphrases
  • low latency
  • efficient implementation
  • highly efficient
  • data sets
  • multi dimensional
  • low complexity
  • decoding algorithm