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A low-power dual-PFD phase-rotating PLL with a PFD controller for 5Gb/s serial links.
Jun-Han Bae
Kyoung-Ho Kim
Seok Kim
Kee-Won Kwon
Jung-Hoon Chun
Published in:
ISCAS (2012)
Keyphrases
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low power
high speed
power consumption
low cost
high power
wireless transmission
single chip
vlsi architecture
real time
logic circuits
digital signal processing
gate array
vlsi circuits
control system
low power consumption
power dissipation
mixed signal
computer simulation
video sequences