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Pre-silicon prototyping of a unified hardware architecture for cryptographic manipulation detection codes.
T. S. Ganesh
T. S. B. Sudarshan
Naveen Kumar Srinivasan
Karthick Jayapal
Published in:
FPT (2004)
Keyphrases
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hardware architecture
hardware implementation
detection algorithm
low cost
smart card
case study
development process
error correction
hardware architectures
neural network
image segmentation
fine grained
low power
field programmable gate array
security protocols