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An Integration and Time-Sampling based Readout Circuit with Current Compensation for Parallel MAC operations in RRAM Arrays.

Weiping YangShilin ZhouHui XuQimin ZhouJingyu LiQingjiang LiYinan WangChanglin Chen
Published in: ISCAS (2024)
Keyphrases
  • real time
  • high speed
  • parallel processing
  • parallel computing
  • processing units
  • data sets
  • genetic algorithm
  • database systems
  • data structure
  • data integration
  • monte carlo
  • shared memory
  • distributed memory