Hierarchical-Analysis-Based Fast Chip-Scale Power Estimation Method for Large and Complex LSIs.
Yuichi NakamuraTakeshi YoshimuraPublished in: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2006)
Keyphrases
- high accuracy
- pairwise
- estimation algorithm
- cost function
- computational cost
- estimation accuracy
- monte carlo simulation
- high precision
- synthetic data
- detection method
- clustering method
- experimental evaluation
- preprocessing
- similarity measure
- image analysis
- classification method
- support vector machine svm
- hierarchical model
- segmentation method
- high speed
- objective function