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A 13-bit 70MS/s SAR-Assisted 2-bit/cycle Cyclic ADC with Offset Cancellation and Slack-Borrowing Logic.

Rucheng JiangHan WuKian Ann NgChne-Wuen TsaiJerald Yoo
Published in: ESSCIRC (2023)
Keyphrases
  • random access memory
  • logical operations
  • image quality
  • bit vector
  • data sets
  • modal logic
  • shift register