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FPGA Realization of Hardware-Flexible Parallel Structure FIR Filters Using Combined Systolic Arrays.
Xuefeng Dai
Jun Gu
Peng Ye
Yu Zhao
Kuojun Yang
Published in:
I2MTC (2020)
Keyphrases
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parallel hardware
vlsi implementation
low cost
fir filters
systolic array
hardware implementation
field programmable gate array
massively parallel
hardware design
finite impulse response
parallel architecture
computer vision
hardware architecture
filter bank
computer architecture