Low Power Multilevel Interconnect Networks Using Wave-Pipelined Multiplexed (WPM) Routing.
Ajay JoshiVinita V. DeodharJeffrey A. DavisPublished in: VLSI Design (2006)
Keyphrases
- low power
- high speed
- power consumption
- low cost
- eye typing
- power dissipation
- interconnection networks
- text entry
- high power
- single chip
- wireless transmission
- vlsi circuits
- low power consumption
- digital signal processing
- logic circuits
- real time
- cmos technology
- vlsi architecture
- delay insensitive
- network structure
- routing protocol
- wireless ad hoc networks
- routing algorithm
- ad hoc networks
- power reduction
- ultra low power
- dynamic range
- routing scheme
- bit rate
- nm technology
- gate array