Sustainable multi-core architecture with on-chip wireless links.
Jacob MurrayJohn KlingnerPartha Pratim PandeBehrooz A. ShiraziPublished in: ACM Great Lakes Symposium on VLSI (2012)
Keyphrases
- multi core architecture
- wireless link
- energy efficient
- base station
- digital signal processor
- multi core processors
- cross layer
- high speed
- low cost
- wireless sensor networks
- quality of service
- packet loss
- wireless networks
- energy consumption
- level parallelism
- ad hoc networks
- real time
- congestion control
- sensor nodes
- sensor networks
- multi layer
- multithreading
- data transmission
- mobile users
- routing protocol
- single instruction multiple data
- neural network