An efficient VLSI architecture for rate disdortion optimization in AVS video encoder.

Hai Bing Yin Xi Zhong Lou Zhe Lei Xia Wen Gao

Published in: ISCAS (2008)

Keyphrases

low complexity
vlsi architecture
video encoder
mode decision
motion estimation
computational complexity
vlsi implementation
video codec
distributed video coding
bit plane
video coding
video compression
computer vision
optical flow
low power
video streaming