Login / Signup
High-level synthesis for large bit-width multipliers on FPGAs: a case study.
Gang Quan
James P. Davis
Siddhaveerasharan Devarkal
Duncan A. Buell
Published in:
CODES+ISSS (2005)
Keyphrases
</>
high level synthesis
design space exploration
parallel architecture
case study
low cost
field programmable gate array
computer vision
image segmentation
pattern recognition
higher order
autonomous agents
hardware implementation