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Erratum to: Folded down-conversion mixer for a 60 GHz receiver architecture in 65-nm CMOS technology.
Najam Muhammad Amin
Zhigong Wang
Zhiqun Li
Published in:
Frontiers Inf. Technol. Electron. Eng. (2015)
Keyphrases
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cmos technology
low power
power consumption
spl times
high speed
parallel processing
low voltage
clock frequency
power dissipation
mixed signal
image sensor
low cost
silicon on insulator
real time
digital images
image processing
network on chip