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Power-and-area efficient 14-bit 1.5 MSample/s two-stage algorithmic ADC based on a mismatch-insensitive MDAC.

Bruno EsperancaJoão GoesRui Santos-TavaresAcacio GalhardoNuno PaulinoManuel Medeiros Silva
Published in: ISCAS (2008)
Keyphrases
  • neural network
  • cost effective
  • bit vector
  • real time
  • real world
  • information retrieval
  • information systems
  • data streams
  • artificial neural networks
  • low cost
  • computationally expensive