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A 10-Gb/s OEIC with Meshed Spatially-Modulated Photo Detector in 0.18-μm CMOS Technology.
Shih-Hao Huang
Wei-Zen Chen
Yu-Wei Chang
Yang-Tung Huang
Published in:
IEEE J. Solid State Circuits (2011)
Keyphrases
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cmos technology
low power
high speed
spl times
low voltage
power consumption
parallel processing
power dissipation
mixed signal
low cost
image sequences
flip flops
digital images
digital camera
image sensor