A Configurable Architecture of ANN in Hardware with Resource-Efficient Reusable Neuron.

Jiahao Lu Xianghua Luo Dongsheng Liu Peng Liu Bo Liu

Published in: ASICON (2019)

Keyphrases

artificial neural networks
neural network
real time
low cost
hardware architecture
resource allocation
pipeline architecture
image processing
hardware design
parallel architectures
vlsi implementation
vlsi architecture