High-speed AWG exploiting parallel time interleaved DAC cores.
Mauro D'ArcoLeopoldo AngrisaniPietro MonsurròAlessandro TrifilettiPublished in: I2MTC (2020)
Keyphrases
- high speed
- multi core processors
- multi core systems
- low power
- parallel implementation
- level parallelism
- multi core architecture
- parallel processing
- parallel computing
- message passing interface
- parallel architectures
- max csp
- shared memory
- computer architecture
- parallel hardware
- parallel programming
- depth first search
- real time
- load balancing
- cloud computing
- website
- databases